I'm a PhD candidate in Computer Science and I'm working on my first paper that should be published in a peer-reviewed journal (until now, I published only papers in conferences). My project is a FPGA memory module, which uses a specific approach (the main idea) to obtain better performance in terms of access philosophy and capacity.
Now, the mentioned idea is naturally the bulk of the paper, with the math, proofs, algorithms, etc. behind it. But, since the module was synthesized and tested, I feel obliged to address its obtained "measures".
The process generated quite a lot data which become even more after the simulations were done. So, I'm not sure what charts/tables are appropriate to analyze and publish in a paper? (e.g. input->output delay for a range of inputs; parameters like max clock, number of logic elements; perhaps even (parts) of the schema; etc.)
As this seems a bit specific, I would like to broaden the scope of the question. Namely, the general issue here is how to filter data which does not directly contribute to the understanding of the main idea, but is the result of a finished project and can be used to reinforce the researched concept with practical measurements and simulations. This obtained data is large, so I'm asking for guidelines what could be considered concise enough to put into a paper.